Multi-Project Wafer Run Schedule

The submission deadlines for all of the upcoming silicon MPW runs are listed here. All designs must be submitted by the Final Submission Date, by the time specified, in order to be included in the run. Designs must either be free of critical design rule check (DRC) violations, or any remaining DRC errors must be waived by the designer.

Designers can request an optional draft layout review by ANT staff in advance of the final submission date, in case there are any concerns about DRC errors, manufacturing costs, etc. This request must be made before the Last Date for Draft Layout Review to Support.

Designs requiring additional customizations such as facet-attached microlenses (FaML) or Layer 6 through-cladding windows to BOX must be requested two weeks before the final DRC-clean deadline. These designs must be requested by emailing Support and including a draft GDS design file for review.